Research and Development of Models for Obtaining the Physical Address of Data in the Processor

The topic of virtual memory concept and address translation mechanism is studied in this master's thesis. The work includes the study of theoretical foundations on this topic, as well as the investigation of implementations in the x86 architecture. This study is relevant for specialists in the field of information technology and software, as well as for those involved in the research and development of processors and memory systems, as it touches on key memory management mechanisms, the development of which represents significant complexity. Based on the studied documentation and materials on the described topic, a software solution of a simulator is presented, illustrating the concepts of virtual memory and address translation mechanism. The simulator serves as a methodological guide that helps in mastering and improving the understanding of these areas of knowledge. Existing software analogues have a number of disadvantages related to functional limitations. The implemented web-based simulator solution is devoid of these disadvantages, which allows it to potentially find a broader application in the future.